RAUL
JIMENEZ NAHARRO
PROFESOR TITULAR DE UNIVERSIDAD
Universidad de Sevilla
Sevilla, EspañaPublicaciones en colaboración con investigadores/as de Universidad de Sevilla (9)
2010
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A compact voltage-controlled transconductor with high linearity
2010 IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2010 - Proceedings
2006
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Optimization of master-slave flip-flops for high-performance applications
Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
2003
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A new hybrid CBL-CMOS cell for optimum noise/power application
Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), Vol. 2799, pp. 491-500
2002
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A technique to generate CMOS VLSI flip-flops based on differential latches
Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
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Analysis of high-performance flip-flops for submicron mixed-signal applications
Analog Integrated Circuits and Signal Processing, Vol. 33, Núm. 2, pp. 145-156
2000
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An application of self-timed circuits to the reduction of switching noise in analog-digital circuits
Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
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Influence of clocking strategies on the design of low switching-noise digital and mixed-signal VLSI circuits
Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), Vol. 1918, pp. 316-326
1998
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Efficient self-timed circuits based on weak NMOS-trees
Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems, Vol. 3, pp. 179-182
1995
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New CMOS VLSI linear self-timed architectures
Asynchronous Design Methodologies, Working Conference Proceedings