Publicaciones en las que colabora con JUAN ANTONIO GOMEZ GALAN (19)

2020

  1. Real-time wireless platform for in vivo monitoring of bone regeneration

    Sensors (Switzerland), Vol. 20, Núm. 16, pp. 1-23

2016

  1. Defending electronic systems against hardware attack

    Tecnología, Aprendizaje y Enseñanza de la Electrónica: TAEE 2016: Libro de Actas del XII Congreso de Tecnología, Aprendizaje y Enseñanza de la Electrónica

2015

  1. A 1.2-V 450-μW Gm-C Bluetooth Channel Filter Using a Novel Gain-Boosted Tunable Transconductor

    IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 23, Núm. 8, pp. 1572-1576

  2. Linear tunable analog front-end electronics for silicon charged-particle detectors

    IEEE Transactions on Instrumentation and Measurement, Vol. 64, Núm. 2, pp. 418-426

2014

  1. Low power analog front-end electronics in deep submicrometer CMOS technology based on gain enhancement techniques

    Nuclear Instruments and Methods in Physics Research, Section A: Accelerators, Spectrometers, Detectors and Associated Equipment, Vol. 749, pp. 90-95

  2. Low power low noise high speed tunable CMOS radiation detection system

    Microelectronics Journal, Vol. 45, Núm. 10, pp. 1319-1326

  3. Low voltage analog readout channel based on gain-boosted amplifiers

    Proceedings - 2014 9th IEEE International Conference on Design and Technology of Integrated Systems in Nanoscale Era, DTIS 2014

2013

  1. Design and implementation of a new real-time frequency sensor used as hardware countermeasure

    Sensors (Switzerland), Vol. 13, Núm. 9, pp. 11709-11727

  2. FPGA-based implementation of a real-time timing measuring device

    2013 European Conference on Circuit Theory and Design, ECCTD 2013 - Proceedings

  3. High speed low power FEE for silicon detectors in nuclear physics applications

    Nuclear Instruments and Methods in Physics Research, Section A: Accelerators, Spectrometers, Detectors and Associated Equipment, Vol. 714, pp. 155-162

2012

  1. FPGA implementation of hardware countermeasures

    SPL 2012 - 8th Southern Programmable Logic Conference

  2. Implementation of a neural network for digital pulse shape analysis on a FPGA for on-line identification of heavy ions

    Nuclear Instruments and Methods in Physics Research, Section A: Accelerators, Spectrometers, Detectors and Associated Equipment, Vol. 674, pp. 99-104