Publications in collaboration with researchers from Instituto de Microelectrónica de Sevilla (21)

2013

  1. CAD tools for hardware implementation of embedded fuzzy systems on FPGAs

    IEEE Transactions on Industrial Informatics, Vol. 9, Núm. 3, pp. 1635-1644

2012

  1. XFSML: An XML-based modeling language for fuzzy systems

    IEEE International Conference on Fuzzy Systems

2006

  1. Fuzzy logic activities at the microelectronics institute of seville

    Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

2005

  1. Embedded fuzzy controllers on standard DSPs

    IEEE International Symposium on Industrial Electronics

  2. Prototype board for the test of self-timed circuits developed in FPGAs

    Proceedings of SPIE - The International Society for Optical Engineering

2004

  1. Automatic design of fuzzy controllers for car-like autonomous robots

    IEEE Transactions on Fuzzy Systems, Vol. 12, Núm. 4, pp. 447-465

  2. Development of fuzzy control systems on programmable chips: Application to motion planning of mobile robots

    Robotics: Trends, Principles, and Applications - Proceedings of the Sixth Biannual World Automation Congress, WAC

2003

  1. Rapid design of fuzzy systems with Xfuzzy

    IEEE International Conference on Fuzzy Systems

  2. Tuning complex fuzzy systems by supervised learning algorithms

    IEEE International Conference on Fuzzy Systems

2002

  1. Automatic design of fuzzy control systems for autonomous mobile robots

    IECON Proceedings (Industrial Electronics Conference)

  2. High-performance edge-triggered flip-flops using weak-branch differential latch

    Electronics Letters, Vol. 38, Núm. 21, pp. 1243-1244

  3. NORFREA: An algorithm for non redundant fuzzy rule extraction

    Proceedings of the IEEE International Conference on Systems, Man and Cybernetics, Vol. 1, pp. 584-588

2001

  1. Practical low-cost CPL implementations of threshold logic functions

    Proceedings of the IEEE Great Lakes Symposium on VLSI

1998

  1. Design and characterisation of a CMOS VLSI self-timed multiplier architecture based on a bit-level pipelined-array structure

    IEE Proceedings: Circuits, Devices and Systems, Vol. 145, Núm. 4, pp. 247-253

1995

  1. Chaotic synchronization using monolithic Chua oscillators

    International Journal of Electronics, Vol. 79, Núm. 6, pp. 775-785