Publicaciones en las que colabora con Antonio José Acosta Jiménez (10)

2006

  1. Optimization of master-slave flip-flops for high-performance applications

    Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

2003

  1. A new hybrid CBL-CMOS cell for optimum noise/power application

    Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), Vol. 2799, pp. 491-500

2002

  1. A technique to generate CMOS VLSI flip-flops based on differential latches

    Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

  2. Analysis of high-performance flip-flops for submicron mixed-signal applications

    Analog Integrated Circuits and Signal Processing, Vol. 33, Núm. 2, pp. 145-156

  3. High-performance edge-triggered flip-flops using weak-branch differential latch

    Electronics Letters, Vol. 38, Núm. 21, pp. 1243-1244

2000

  1. An application of self-timed circuits to the reduction of switching noise in analog-digital circuits

    Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

  2. Influence of clocking strategies on the design of low switching-noise digital and mixed-signal VLSI circuits

    Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), Vol. 1918, pp. 316-326

1998

  1. Design and characterisation of a CMOS VLSI self-timed multiplier architecture based on a bit-level pipelined-array structure

    IEE Proceedings: Circuits, Devices and Systems, Vol. 145, Núm. 4, pp. 247-253

  2. Efficient self-timed circuits based on weak NMOS-trees

    Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems, Vol. 3, pp. 179-182

1995

  1. New CMOS VLSI linear self-timed architectures

    Asynchronous Design Methodologies, Working Conference Proceedings