Publicacions en col·laboració amb investigadors/es de Instituto de Microelectrónica de Sevilla (6)

2005

  1. Prototype board for the test of self-timed circuits developed in FPGAs

    Proceedings of SPIE - The International Society for Optical Engineering

2002

  1. High-performance edge-triggered flip-flops using weak-branch differential latch

    Electronics Letters, Vol. 38, Núm. 21, pp. 1243-1244

2001

  1. Practical low-cost CPL implementations of threshold logic functions

    Proceedings of the IEEE Great Lakes Symposium on VLSI

1998

  1. Design and characterisation of a CMOS VLSI self-timed multiplier architecture based on a bit-level pipelined-array structure

    IEE Proceedings: Circuits, Devices and Systems, Vol. 145, Núm. 4, pp. 247-253

1995

  1. Chaotic synchronization using monolithic Chua oscillators

    International Journal of Electronics, Vol. 79, Núm. 6, pp. 775-785

  2. Secure communication through switched-current chaotic circuits

    Proceedings - IEEE International Symposium on Circuits and Systems